Open Position

FPGA Team Manager

Job Description

  • BSc in Computer science/ Electrical engineering from known University – Must.
  • 8+ years in FPGA engineering: 5+ in design and 3+ in management
  • Deep knowledge in Verilog – Must.
  • Experience in micro-architecture and design of complex blocks, familiar with the verification process of a block (test plan, coverage, etc.) – Must.
  • Excellent communication skills in English (written and verbal) – Must.
  • Experience with multi-clock domain designs and script knowledge (TCL, Perl, etc.) – Advantage.
  • Experience with chip frontend process (synthesis/STA) – Advantage.
  • Full system view, system engineering experience - Advantage
  • Strong multi-tasking execution orientation.
  • Clear sense of urgency and a “can do” attitude. Effective teamwork and collaboration skills.
  • Self-learning capabilities adapt to changes and study new technical fields.
  • Thorough and accurate.

Job Requirements