Open Position

Verification Engineer

Job Description

The ideal candidate has the following:

Must:

  • Preferred university background – Automatics/Computers, Electrical Engineering.
  • At least 3 years experience with Specman or System Verilog based verification ( specman is preferred ).
  • In depth understanding of overall verification methodologies.
  • Background in Networking IPs and SOC architecture.
  • Understanding of verification and design practices.

Advantage:

  • Experience with RISC processors.
  • Experience with C coding.
  • Verilog.

We are looking for candidates capable of self-learning and working in a dynamic environment, with excellent communication skills and team player, capable of grasping an overall view of complex systems.

Job Requirements